Most existing video codec chips are designed for IP cameras or camcorders. These applications have different requirements for bandwidth control, picture quality and compression delay from wireless HD video transmisson. Moreover, these are hard-coded chips and they cannot implement proprietary video codec. On the other hand, although there are many off-the-shelf programmable DSP chips, they are usually designed for general purpose applications. They are not specifically designed for video processing and cannot meet real-time video algorithm processing requirements.
Optimized ViShare Video DSP Architecture
ViShare Technology Limited has developed a video-optimized DSP, VT202. Owing to its proprietary architecture, it solves the bottleneck on memory bandwidth management in real-time video encoding and decoding. With a programmable digital signal processing architecture, the VT202 processor provides a very powerful and flexible platform to implement a complex video algorithm while meeting the real-time requirements. When the network becomes unstable or there are packet losses, the VT202 system is able to finish the video processing algorithm in a strict requirement of several milliseconds to ensure lag-free user experience. VT202 combines the advantages of hard-coded encoder/decoder’s high speed and DSP’s programmability.
VT202 contains the following hardware components
Moreover, the ViShare DSP technology employs a fully distributed architecture to support scalability and flexibility. It can integrate more DSP cores and hardware accelerators to extend the processing power to supporting 4K resolution encoding and decoding in its next version processor. It can also be programmed to implement other features like gesture/voice recognition, video analysis and image signal processing, etc.
ViShare has implemented a proprietary “NoLag” video codec instead of standard H.264 on VT202. The H.264 compression algorithm transforms the raw pixel information into a series of variable-length symbols. Different parts of a bitstream need to reference some previously transmitted bits. For example, an intra-block of a H.264 frame has to reference the reconstructed pixels of an adjacent block to predict pixels of the current block. Optimum video quality requires the correct reception of all packets in sequential order. If any video packet is lost, not only the corresponding pixel blocks are affected, it will also propagate the errors from the whole frame and all subsequent frames which makes reference to the error frame. Although some error concealment techniques can fill the missing pixel with interpolation techniques, it is still not effective enough to reduce visual artifacts. In short, one of the major problems of using standard H.264 in real-time video streaming is reliability.
However, ViShare’s proprietary video codec can adapt to drastic change in bandwidth. When the network can provide sufficient bandwidth, it can maximize visual quality. When the network bandwidth suddenly drops, it can quickly adapt its encoding bit rate with a very short delay to maintain smooth video playback. Moreover, even if there are large amounts of packet loss, our error recovery algorithm can still achieve graceful degradation of picture quality without showing compression artifacts.